Datasheet

SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
432
25.8.1 Bus Matrix Master Configuration Registers
Name: MATRIX_MCFG0..MATRIX_MCFG3
Address: 0x400E0200
Access: Read/Write
• ULBT: Undefined Length Burst Type
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
––––– ULBT
Value Name Description
0INFINITE
No predicted end of burst is generated and therefore INCR bursts coming from
this master cannot be broken.
1 SINGLE
The undefined length burst is treated as a succession of single access allowing
rearbitration at each beat of the INCR burst.
2 FOUR_BEAT
The undefined length burst is split into a 4-beat bursts allowing rearbitration at
each 4-beat burst end.
3 EIGHT_BEAT
The undefined length burst is split into 8-beat bursts allowing rearbitration at each
8-beat burst end.
4 SIXTEEN_BEAT
The undefined length burst is split into 16-beat bursts allowing rearbitration at
each 16-beat burst end.