Datasheet

SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
394
22.5.9 Cache Controller Monitor Control Register
Name: CMCC_MCTRL
Address: 0x4007C030
Access: Write- only
Reset: 0x00 002000
• SWRST: Monitor
0: No effect.
1: When set to 1, this field resets the event counter register.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
––––––––
76543210
–––––––SWRST