Datasheet

32
42023GS–SAM–03/2014
ATSAM4L8/L4/L2
Inter-IC Sound (I2S) Controller - IISC
IMCK I2S Master Clock Output
ISCK I2S Serial Clock I/O
ISDI I2S Serial Data In Input
ISDO I2S Serial Data Out Output
IWS I2S Word Select I/O
LCD Controller - LCDCA
BIASL Bias voltage (1/3 VLCD) Analog
BIASH Bias voltage (2/3 VLCD) Analog
CAPH High voltage end of flying capacitor Analog
CAPL Low voltage end of flying capacitor Analog
COM3 - COM0 Common terminals Analog
SEG39 - SEG0 Segment terminals Analog
VLCD Bias voltage Analog
Parallel Capture - PARC
PCCK Clock Input
PCDATA7 - PCDATA0 Data lines Input
PCEN1 Data enable 1 Input
PCEN2 Data enable 2 Input
Peripheral Event Controller - PEVC
PAD_EVT3 -
PAD_EVT0
Event Inputs Input
Power Manager - PM
RESET_N Reset Input Low
System Control Interface - SCIF
GCLK3 - GCLK0 Generic Clock Outputs Output
GCLK_IN1 - GCLK_IN0 Generic Clock Inputs Input
XIN0 Crystal 0 Input
Analog/
Digital
XOUT0 Crystal 0 Output Analog
Serial Peripheral Interface - SPI
MISO Master In Slave Out I/O
MOSI Master Out Slave In I/O
NPCS3 - NPCS0 SPI Peripheral Chip Selects I/O Low
SCK Clock I/O
Timer/Counter - TC0, TC1
Table 3-8. Signal Descriptions List (Sheet 2 of 4)
Signal Name Function Type
Active
Level Comments