Datasheet

101
42023GS–SAM–03/2014
ATSAM4L8/L4/L2
9.4 Maximum Clock Frequencies
Table 9-4. Maximum Clock Frequencies in Power Scaling Mode 0/2 and RUN Mode
Symbol Parameter Description Max Units
f
CPU
CPU clock frequency 48
MHz
f
PBA
PBA clock frequency 48
f
PBB
PBB clock frequency 48
f
PBC
PBC clock frequency 48
f
PBD
PBD clock frequency 48
f
GCLK0
GCLK0 clock frequency DFLLIF main reference, GCLK0 pin 50
f
GCLK1
GCLK1 clock frequency
DFLLIF dithering and SSG reference,
GCLK1 pin
50
f
GCLK2
GCLK2 clock frequency AST, GCLK2 pin 20
f
GCLK3
GCLK3 clock frequency CATB, GCLK3 pin 50
f
GCLK4
GCLK4 clock frequency FLO and AESA 50
f
GCLK5
GCLK5 clock frequency GLOC, TC0 and RC32KIFB_REF 80
f
GCLK6
GCLK6 clock frequency ABDACB and IISC 50
f
GCLK7
GCLK7 clock frequency USBC 50
f
GCLK8
GCLK8 clock frequency TC1 and PEVC[0] 50
f
GCLK9
GCLK9 clock frequency PLL0 and PEVC[1] 50
f
GCLK10
GCLK10 clock
frequency
ADCIFE 50
f
GCLK11
GCLK11 clock
frequency
Master generic clock. Can be used as
source for other generic clocks
150
f
OSC0
OSC0 output frequency
Oscillator 0 in crystal mode 30
Oscillator 0 in digital clock mode 50
f
PLL
PLL output frequency Phase Locked Loop 240
f
DFLL
DFLL output frequency Digital Frequency Locked Loop 220
f
RC80M
RC80M output
frequency
Internal 80MHz RC Oscillator 80