Datasheet

910
42023E–SAM–07/2013
ATSAM4L8/L4/L2
33.7.6 Interrupt Mask Register
Name:
IMR
Access: Read-only
Offset: 0x14
Reset Value: 0x00000000
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
A bit in this register is cleared when the corresponding bit in IDR is written to one.
A bit in this register is set when the corresponding bit in IER is written to one.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
–––––––TXRDY