Datasheet

651

42023E–SAM–07/2013

ATSAM4L8/L4/L2

24.8 Module Configuration

The specific configuration for each USART instance is listed in the following tables.The module

bus clocks listed here are connected to the system bus clocks. Refer to the Power Manager

chapter for details.

Table 24-30. Module configuration

Feature USART0 USART1 USART2 USART3

SPI Logic Implemented Implemented Implemented Implemented

LIN Logic Implemented Not Implemented Not Implemented Not Implemented

Manchester Logic Implemented Not Implemented Not Implemented Not Implemented

IRDA Logic Implemented Not Implemented Not Implemented Not Implemented

RS485 Logic Implemented Not Implemented Not Implemented Not Implemented

Fractional Baudrate Implemented Implemented Implemented Implemented

ISO7816 Implemented Not Implemented Not Implemented Not Implemented

DIV value for divided CLK_USART8888

Receiver Time-out Counter Size

(Size of the RTOR.TO field)

17-bits 8-bits 8-bits 8-bits

Table 24-31. Module clock name

Module name Clock name

USART0 CLK_USART0

USART1 CLK_USART1

USART2 CLK_USART2

USART3 CLK_USART3

Table 24-32. Register Reset Values

VERSION 0x00000602