Datasheet

549
42023E–SAM–07/2013
ATSAM4L8/L4/L2
0x064 Pin Value Register - - - N N
0x068 Pin Value Register - - - N N
0x06c Pin Value Register - - - N N
0x070 Pull-up Enable Register Read/Write PUER Read/Write -
(1)
Y N
0x074 Pull-up Enable Register Set PUERS Write-only Y N
0x078 Pull-up Enable Register Clear PUERC Write-only Y N
0x07C Pull-up Enable Register Toggle PUERT Write-only Y N
0x080 Pull-down Enable Register Read/Write PDER Read/Write (1) Y N
0x084 Pull-down Enable Register Set PDERS Write-only Y N
0x088 Pull-down Enable Register Clear PDERC Write-only Y N
0x08C Pull-down Enable Register Toggle PDERT Write-only Y N
0x090 Interrupt Enable Register Read/Write IER Read/Write -
(1)
N N
0x094 Interrupt Enable Register Set IERS Write-only N N
0x098 Interrupt Enable Register Clear IERC Write-only N N
0x09C Interrupt Enable Register Toggle IERT Write-only N N
0x0A0 Interrupt Mode Register 0 Read/Write IMR0 Read/Write -
(1)
NN
0x0A4 Interrupt Mode Register 0 Set IMR0S Write-only N N
0x0A8 Interrupt Mode Register 0 Clear IMR0C Write-only N N
0x0AC Interrupt Mode Register 0 Toggle IMR0T Write-only N N
0x0B0 Interrupt Mode Register 1 Read/Write IMR1 Read/Write -
(1)
N N
0x0B4 Interrupt Mode Register 1 Set IMR1S Write-only N N
0x0B8 Interrupt Mode Register 1 Clear IMR1C Write-only N N
0x0BC Interrupt Mode Register 1 Toggle IMR1T Write-only N N
0x0C0 Glitch Filter Enable Register Read/Write GFER Read/Write -
(1)
NN
0x0C4 Glitch Filter Enable Register Set GFERS Write-only N N
0x0C8 Glitch Filter Enable Register Clear GFERC Write-only N N
0x0CC Glitch Filter Enable Register Toggle GFERT Write-only N N
0x0D0 Interrupt Flag Register Read IFR Read-only -
(1)
N N
0x0D4 Interrupt Flag Register - - - N N
0x0D8 Interrupt Flag Register Clear IFRC Write-only N N
0x0DC Interrupt Flag Register - - - N N
0x100 Output Driving Capability Register 0 Read/Write ODCR0 Read/Write -
(1)
YN
0x104 Output Driving Capability Register 0 Set ODCR0S Write-only Y N
0x108 Output Driving Capability Register 0 Clear ODCR0C Write-only Y N
0x10C Output Driving Capability Register 0 Toggle ODCR0T Write-only Y N
Table 23-2. GPIO Register Memory Map
Offset Register Function Register Name Access Reset
Config.
Protection
Access
Protection