Datasheet

548
42023E–SAM–07/2013
ATSAM4L8/L4/L2
ten to one. Again all bits written to zero remain unchanged. Note that for some registers (e.g.
IFR), not all access methods are permitted.
Note that for ports with less than 32 bits, the corresponding control registers will have unused
bits. This is also the case for features that are not implemented for a specific pin. Writing to an
unused bit will have no effect. Reading unused bits will always return 0.
Table 23-2. GPIO Register Memory Map
Offset Register Function Register Name Access Reset
Config.
Protection
Access
Protection
0x000 GPIO Enable Register Read/Write GPER Read/Write -
(1)
YN
0x004 GPIO Enable Register Set GPERS Write-only Y N
0x008 GPIO Enable Register Clear GPERC Write-only Y N
0x00C GPIO Enable Register Toggle GPERT Write-only Y N
0x010 Peripheral Mux Register 0 Read/Write PMR0 Read/Write -
(1)
Y N
0x014 Peripheral Mux Register 0 Set PMR0S Write-only Y N
0x018 Peripheral Mux Register 0 Clear PMR0C Write-only Y N
0x01C Peripheral Mux Register 0 Toggle PMR0T Write-only Y N
0x020 Peripheral Mux Register 1 Read/Write PMR1 Read/Write -
(1)
YN
0x024 Peripheral Mux Register 1 Set PMR1S Write-only Y N
0x028 Peripheral Mux Register 1 Clear PMR1C Write-only Y N
0x02C Peripheral Mux Register 1 Toggle PMR1T Write-only Y N
0x030 Peripheral Mux Register 2 Read/Write PMR2 Read/Write -
(1)
Y N
0x034 Peripheral Mux Register 2 Set PMR2S Write-only Y N
0x038 Peripheral Mux Register 2 Clear PMR2C Write-only Y N
0x03C Peripheral Mux Register 2 Toggle PMR2T Write-only Y N
0x040 Output Driver Enable Register Read/Write ODER Read/Write -
(1)
YN
0x044 Output Driver Enable Register Set ODERS Write-only Y N
0x048 Output Driver Enable Register Clear ODERC Write-only Y N
0x04C Output Driver Enable Register Toggle ODERT Write-only Y N
0x050 Output Value Register Read/Write OVR Read/Write -
(1)
N N
0x054 Output Value Register Set OVRS Write-only N N
0x058 Output Value Register Clear OVRC Write-only N N
0x05c Output Value Register Toggle OVRT Write-only N N
0x060 Pin Value Register Read PVR Read-only
Depe
nding
on pin
states
NN