Datasheet

261
42023E–SAM–07/2013
ATSAM4L8/L4/L2
Table 13-11. HRP and FP Clock Sources
CKSEL Clock/Oscillator Description
0 OSC0 Output clock from Oscillator0
1 PLL0 Output clock from PLL0
2 DFLL0 Output clock from DFLL0
3 reserved
4 RC80M Output from 80MHz RCOSC
Table 13-12. Register Reset Values
Register Reset Value
RCFASTVERSION 0x00000200
GCLKPRESCVERSION 0x00000102
PLLIFAVERSION 0x00000112
OSCIFAVERSION 0x00000114
DFLLIFBVERSION 0x00000110
RCOSCIFAVERSION 0x00000114
RC80MVERSION 0x00000100
GCLKIFVERSION 0x00000112
VERSION 0x00000130