Datasheet

259
42023E–SAM–07/2013
ATSAM4L8/L4/L2
In ATSAM4L8/L4/L2, there are 12 generic clocks. These are allocated to different functions as
shown in Table 13-7.
Table 13-7. Generic Clock Allocation
Clock number Function
0
DFLLIF main reference and GCLK0 pin
(CLK_DFLLIF_REF)
1
DFLLIF dithering and SSG reference and GCLK1 pin
(CLK_DFLLIF_DITHER)
2 AST and GCLK2 pin
3 CATB and GCLK3 pin
4 AESA
5 GLOC, TC0 and RC32KIFB_REF
6 ABDACB and IISC
7 USBC
8 TC1 and PEVC[0]
9 PLL0 and PEVC[1]
10 ADCIFE
11
Master generic clock. Can be used as source for other
generic clocks.
Table 13-8. Generic Clock Sources
OSCSEL Clock/Oscillator Description
0 RCSYS System RC oscillator clock
1 OSC32K Output clock from OSC32K
2 DFLL0 Output clock from DFLL0
3 OSC0 Output clock from Oscillator0
4 RC80M Output from 80MHz RCOSC
5 RCFAST Output from 4,8,12MHz RCFAST
6 RC1M Output from 1MHz RC1M
7 CLK_CPU The clock the CPU runs on
8 CLK_HSB High Speed Bus clock
9 CLK_PBA Peripheral Bus A clock
10 CLK_PBB Peripheral Bus B clock
11 CLK_PBC Peripheral Bus C clock
12 CLK_PBD Peripheral Bus D clock
13 RC32K Output from 32kHz RCOSC
14 reserved