Datasheet

234
42023E–SAM–07/2013
ATSAM4L8/L4/L2
13.7.12 DFLLx Multiplier Register
Name: DFLLxMUL
Access Type: Read/Write
Reset Value: 0x00000000
• MUL: DFLL Multiply Factor
This field determines the ratio of the CLK_DFLLx output frequency to the CLK_DFLLx_REF input frequency.
Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Refer to
Section 13.7.7 ”Unlock Register” on page 228 for details.
31 30 29 28 27 26 25 24
-
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23 22 21 20 19 18 17 16
-
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15 14 13 12 11 10 9 8
MUL[15:8]
76543210
MUL[7:0]