Datasheet

201
42023E–SAM–07/2013
ATSAM4L8/L4/L2
12.8 Module Configuration
The specific configuration for each BSCIF instance is listed in the following tables.The module
bus clocks listed here are connected to the system bus clocks. Refer to Section 10. ”Power Man-
ager (PM)” on page 108 for details.
Table 12-8. MODULE Clock Name
Module Name Clock Name Description
BSCIF CLK_BSCIF Clock for the BSCIF bus interface
Table 12-9. Bandgap Buffer Mapping
Bit BG Buffer Description
0 Flash Flash
1PLL PLL
2 VREG Main Regulator
4ADC ADC
5LCD LCD
Table 12-10. Register Reset Values
Register Reset Value
BRIFBVERSION 0x00000100
BGREFIFBVERSION 0x00000110
VREGIFGVERSION 0x00000110
BODIFCVERSION 0x00000110
RC32KIFBVERSION 0x00000100
OSC32IFAVERSION 0x00000200
BSCIFVERSION 0x00000100