Datasheet

1193
42023E–SAM–07/2013
ATSAM4L8/L4/L2
Table of Contents
Summary.................................................................................................... 1
Features ..................................................................................................... 1
1 Description ............................................................................................... 3
2 Overview ................................................................................................... 5
2.1 Block Diagram ...................................................................................................5
2.2 Configuration Summary .....................................................................................6
3 Package and Pinout ................................................................................. 8
3.1 Package .............................................................................................................8
3.2 Peripheral Multiplexing on I/O lines .................................................................18
3.3 Signals Description ..........................................................................................30
3.4 I/O Line Considerations ...................................................................................33
4 Cortex-M4 processor and core peripherals ......................................... 35
4.1 Cortex-M4 ........................................................................................................35
4.2 System level interface .....................................................................................36
4.3 Integrated configurable debug .........................................................................36
4.4 Cortex-M4 processor features and benefits summary .....................................37
4.5 Cortex-M4 core peripherals .............................................................................37
4.6 Cortex-M4 implementations options ................................................................38
4.7 Cortex-M4 Interrupts map ................................................................................38
4.8 Peripheral Debug .............................................................................................41
5 Power and Startup Considerations ...................................................... 42
5.1 Power Domain Overview .................................................................................42
5.2 Power Supplies ................................................................................................44
5.3 Startup Considerations ....................................................................................49
5.4 Power-on-Reset, Brownout and Supply Monitor .............................................49
6 Low Power Techniques ......................................................................... 51
6.1 Power Save Modes .........................................................................................51
6.2 Power Scaling ..................................................................................................56
7 Memories ................................................................................................ 58
7.1 Product Mapping .............................................................................................58
7.2 Embedded Memories ......................................................................................59
7.3 Physical Memory Map .....................................................................................59