Datasheet

1058
42023E–SAM–07/2013
ATSAM4L8/L4/L2
39.7.3 Timing Register
Name:
TIM
Access Type: Read/Write
Offset: 0x08
Reset Value: 0x00000000
CLKDIV and PRESC shall not be modified when LCD controller is enabled.
FCx shall not be modified when Frame Counter x is enabled.
• FC2: Frame Counter 2
Number of frame before rollover = ((FC2 * 8) + 1).
• FC1: Frame Counter 1
Number of frame before rollover = ((FC1 * 8) + 1).
• FC0PB: Frame Counter 0 Prescaler Bypass
0: FC Prescaler is not bypassed
1: FC Prescaler is bypassed
• FC0: Frame Counter 0
Number of frame before rollover = ((FC0 * 8) + 1) if FC0PB=0 else (FC0 + 1).
• CLKDIV: LCD Clock Division
Defines the LCD frame rate.
K = 8 for 1/4, 1/2 and static duty.
K = 6 for 1/3 duty.
• PRESC: LCD Prescaler Select
0: N = 8
1: N = 16
31 30 29 28 27 26 25 24
--- FC2
23 22 21 20 19 18 17 16
--- FC1
15 14 13 12 11 10 9 8
--FC0PB FC0
76543210
---- CLKDIV PRESC
FrameRate
Fclk
LCD
()
KN 1 CLKDIV+()×× 2
1 WMOD–()
×()
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