Datasheet

1053
42023E–SAM–07/2013
ATSAM4L8/L4/L2
39.7 User Interface
Note: 1. The reset value for this register is device specific. Please refer to the Module Configuration section at the end of this chapter.
Table 39-12. LCDCA Register Memory Map
Offset Register Register Name Access Reset
0x00 Control Register CR Write-Only -
0x04 Configuration Register CFG Read/Write 0x00000000
0x08 Timing Register TIM Read/Write 0x00000000
0x0C Status Register SR Read-Only 0x00000000
0x10 Status Clear Register SCR Write-Only -
0x14 Data Register Low 0 DRL0 Read/Write -
0x18 Data Register High 0 DRH0 Read/Write -
0x1C Data Register Low 1 DRL1 Read/Write -
0x20 Data Register High 1 DRH1 Read/Write -
0x24 Data Register Low 2 DRL2 Read/Write -
0x28 Data Register High 2 DRH2 Read/Write -
0x2C Data Register Low 3 DRL3 Read/Write -
0x30 Data Register High 3 DRH3 Read/Write -
0x34 Indirect Access Data Register IADR Write-Only -
0x38 Blink Configuration Register BCFG Read/Write 0x00000000
0x3C Circular Shift Register Configuration CSRCFG Read/Write 0x00000000
0x40 Character Mapping Configuration Register CMCFG Read/Write 0x00000000
0x44 Character Mapping Data Register CMDR Write-Only -
0x48 Automated Character Mapping Configuration Register ACMCFG Read/Write 0x00000000
0x4C Automated Character Mapping Data Register ACMDR Write-Only -
0x50 Automated Bit Mapping Configuration Register ABMCFG Read/Write 0x00000000
0x54 Automated Bit Mapping Data Register ABMDR Write-Only -
0x58 Interrupt Enable Register IER Write-Only -
0x5C Interrupt Disable Register IDR Write-Only -
0x60 Interrupt Mask Register IMR Read-Only 0x00000000
0x64 Version Register VERSION Read-Only -
(1)