Datasheet

32
42023ES–SAM–07/2013
ATSAM4L8/L4/L2
A0 Channel 0 Line A I/O
A1 Channel 1 Line A I/O
A2 Channel 2 Line A I/O
B0 Channel 0 Line B I/O
B1 Channel 1 Line B I/O
B2 Channel 2 Line B I/O
CLK0 Channel 0 External Clock Input Input
CLK1 Channel 1 External Clock Input Input
CLK2 Channel 2 External Clock Input Input
Two-wire Interface - TWIMS0, TWIMS1, TWIM2, TWIM3
TWCK Two-wire Serial Clock I/O
TWD Two-wire Serial Data I/O
Universal Synchronous Asynchronous Receiver Transmitter - USART0, USART1, USART2, USART3
CLK Clock I/O
CTS Clear To Send Input Low
RTS Request To Send Output Low
RXD Receive Data Input
TXD Transmit Data Output
USB 2.0 Interface - USBC
DM USB Full Speed Interface Data - I/O
DP USB Full Speed Interface Data + I/O
Power
GND Ground Ground
GNDANA Analog Ground Ground
VDDANA Analog Power Supply
Power
Input
1.68V to 3.6V
VDDCORE Core Power Supply
Power
Input
1.68V to 1.98V
VDDIN Voltage Regulator Input
Power
Input
1.68V to 3.6V
VDDIO I/O Pads Power Supply
Power
Input
1.68V to 3.6V. VDDIO must
always be equal to or lower than
VDDIN.
VDDOUT Voltage Regulator Output
Power
Output
1.08V to 1.98V
General Purpose I/O
Table 3-8. Signal Descriptions List (Sheet 3 of 4)
Signal Name Function Type
Active
Level Comments