Datasheet

101
42023ES–SAM–07/2013
ATSAM4L8/L4/L2
Table 9-5. Maximum Clock Frequencies in Power Scaling Mode 1 and RUN Mode
Symbol Parameter Description Max Units
f
CPU
CPU clock frequency 12
MHz
f
PBA
PBA clock frequency 12
f
PBB
PBB clock frequency 12
f
PBC
PBC clock frequency 12
f
PBD
PBD clock frequency 12
f
GCLK0
GCLK0 clock frequency DFLLIF main reference, GCLK0 pin 16.6
f
GCLK1
GCLK1 clock frequency
DFLLIF dithering and SSGreference,
GCLK1 pin
16.6
f
GCLK2
GCLK2 clock frequency AST, GCLK2 pin 6.6
f
GCLK3
GCLK3 clock frequency CATB, GCLK3 pin 17.3
f
GCLK4
GCLK4 clock frequency FLO and AESA 16.6
f
GCLK5
GCLK5 clock frequency GLOC, TC0 and RC32KIFB_REF 26.6
f
GCLK6
GCLK6 clock frequency ABDACB and IISC 16.6
f
GCLK7
GCLK7 clock frequency USBC 16.6
f
GCLK8
GCLK8 clock frequency TC1 and PEVC[0] 16.6
f
GCLK9
GCLK9 clock frequency PLL0 and PEVC[1] 16.6
f
GCLK10
GCLK10 clock
frequency
ADCIFE 16.6
f
GCLK11
GCLK11 clock
frequency
Master generic clock. Can be used as
source for other generic clocks
51.2
f
OSC0
OSC0 output frequency
Oscillator 0 in crystal mode 16
Oscillator 0 in digital clock mode 16
f
PLL
PLL output frequency Phase Locked Loop N/A
f
DFLL
DFLL output frequency Digital Frequency Locked Loop N/A
f
RC80M
RC80M output
frequency
Internal 80MHz RC Oscillator N/A