Datasheet

917
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
Figure 38-38. SPI Transfer Format (CPHA = 1, 8 bits per transfer)
Figure 38-39. SPI Transfer Format (CPHA = 0, 8 bits per transfer)
38.7.8.4 Receiver and Transmitter Control
See “Receiver and Transmitter Control” on page 894.
38.7.8.5 Character Transmission
The characters are sent by writing in the Transmit Holding register (US_THR). An additional condition for
transmitting a character can be added when the USART is configured in SPI Master mode. In the “USART Mode
Register (SPI_MODE)” (USART_MR), the value configured on the bit WRDBT can prevent any character
6
SCK
(CPOL = 0)
SCK
(CPOL = 1)
MOSI
SPI Master ->TXD
SPI Slave -> RXD
NSS
SPI Master -> RTS
SPI Slave -> CTS
SCK cycle (for reference)
MSB
MSB
LSB
LSB
6
6
5
5
4
4
3
3
2
2
1
1
123 45 786
MISO
SPI Master ->RXD
SPI Slave -> TXD
SCK
(CPOL = 0)
SCK
(CPOL = 1)
123 45 7
MOSI
SPI Master -> TXD
SPI Slave -> RXD
MISO
SPI Master -> RXD
SPI Slave -> TXD
NSS
SPI Master -> RTS
SPI Slave -> CTS
SCK cycle (for reference)
8
MSB
MSB
LSB
LSB
6
6
5
5
4
4
3
3
1
1
2
2
6