Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
860
36.8.8 TWI Interrupt Disable Register
Name: TWI_IDR
Address: 0x400A8028 (0), 0x400AC028 (1)
Access: Write-only
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Disables the corresponding interrupt.
 TXCOMP: Transmission Completed Interrupt Disable
 RXRDY: Receive Holding Register Ready Interrupt Disable
 TXRDY: Transmit Holding Register Ready Interrupt Disable
 SVACC: Slave Access Interrupt Disable
 GACC: General Call Access Interrupt Disable
 OVRE: Overrun Error Interrupt Disable
 NACK: Not Acknowledge Interrupt Disable
 ARBLST: Arbitration Lost Interrupt Disable
 SCL_WS: Clock Wait State Interrupt Disable
 EOSACC: End Of Slave Access Interrupt Disable
 ENDRX: End of Receive Buffer Interrupt Disable
 ENDTX: End of Transmit Buffer Interrupt Disable
 RXBUFF: Receive Buffer Full Interrupt Disable
 TXBUFE: Transmit Buffer Empty Interrupt Disable
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
TXBUFE RXBUFF ENDTX ENDRX EOSACC SCL_WS ARBLST NACK
76543210
–OVREGACC SVACC – TXRDY RXRDY TXCOMP