Datasheet

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

836

Figure 36-19. TWI Read Operation with Single Data Byte without Internal Address

Set the Control register:

- Master enable

TWI_CR = MSEN + SVDIS

Set the Master Mode register:

- Device slave address

- Transfer direction bit

Read ==> bit MREAD = 1

Start the transfer

TWI_CR = START | STOP

Read status register

RXRDY = 1?

Read Status register

TXCOMP = 1?

END

BEGIN

Yes

Set TWI clock

(CLDIV, CHDIV, CKDIV) in TWI_CWGR

(Needed only once)

Read Receive Holding Register