Datasheet

797
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
Figure 35-7 shows the behavior of Transmit Data Register Empty (TDRE), Receive Data Register (RDRF) and
Transmission Register Empty (TXEMPTY) status flags within the SPI_SR during an 8-bit data transfer in Fixed
mode without the PDC or DMA involved.
Figure 35-7. Status Register Flags Behavior
6
SPCK
MOSI
(from master)
MISO
(from slave)
NPCS0
MSB
MSB
LSB
LSB
6
6
5
5
4
4
3
3
2
2
1
1
123 45 786
RDRF
TDRE
TXEMPTY
Write in
SPI_TDR
RDR read
shift register empty