Datasheet

761
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
34.6.29 PIO Slow Clock Divider Debouncing Register
Name: PIO_SCDR
Address: 0x400E0E8C (PIOA), 0x400E108C (PIOB), 0x400E128C (PIOC), 0x400E148C (PIOD), 0x400E168C
(PIOE)
Access: Read/Write
 DIV: Slow Clock Divider Selection for Debouncing
t
div_slclk
= 2 × (DIV + 1) × t
slow_clock
.
31 302928 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
–– DIV
76543 210
DIV