Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
758
34.6.26 PIO Input Filter Slow Clock Disable Register
Name: PIO_IFSCDR
Address: 0x400E0E80 (PIOA), 0x400E1080 (PIOB), 0x400E1280 (PIOC), 0x400E1480 (PIOD), 0x400E1680 (PIOE)
Access: Write-only
 P0–P31: Peripheral Clock Glitch Filtering Select
0: No effect.
1: The glitch filter is able to filter glitches with a duration < t
peripheral clock
/2.
31 302928 27 26 25 24
P31P30P29P28 P27 P26 P25 P24
23 22 21 20 19 18 17 16
P23 P22 P21 P20 P19 P18 P17 P16
15 14 13 12 11 10 9 8
P15 P14 P13 P12 P11 P10 P9 P8
76543 210
P7 P6 P5 P4 P3 P2 P1 P0