Datasheet

7
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
3. Signal Description
Table 3-1 gives details on signal names classified by peripheral.
Table 3-1. Signal Description List
Signal Name Function Type
Active
Level
Voltage
Reference Comments
Power Supplies
VDDIO Peripherals I/O Lines Power Supply Power – – 1.62V to 3.6V
VDDIN
Voltage Regulator Input, DAC and Analog
Comparator Power Supply
Power – – 1.62V to 3.6V
(1)
VDDOUT Voltage Regulator Output Power – – 1.2V Output
VDDPLL Oscillator and PLL Power Supply Power – – 1.08 V to 1.32V
VDDCORE
Power the core, the embedded memories
and the peripherals
Power – –
1.08V to 1.32V
GND Ground Ground – – –
Clocks, Oscillators and PLLs
XIN Main Oscillator Input Input –
VDDIO
Reset State:
- PIO Input
- Internal Pull-up disabled
- Schmitt Trigger enabled
(2)
XOUT Main Oscillator Output Output –
XIN32 Slow Clock Oscillator Input Input –
XOUT32 Slow Clock Oscillator Output Output –
PCK0 - PCK2 Programmable Clock Output Output –
Reset State:
- PIO Input
- Internal Pull-up enabled
- Schmitt Trigger enabled
(2)
Real-time Clock
RTCOUT0 Programmable RTC waveform output Output –
VDDIO
Reset State:
- PIO Input
- Internal Pull-up enabled
- Schmitt Trigger enabled
(2)
RTCOUT1 Programmable RTC waveform output Output –
Serial Wire/JTAG Debug Port - SWJ-DP
TCK/SWCLK Test Clock/Serial Wire Clock Input –
VDDIO
Reset State:
- SWJ-DP Mode
- Internal Pull-up
disabled
(3)
- Schmitt Trigger enabled
(2)
TDI Test Data In Input –
TDO/TRACESWO
Test Data Out / Trace Asynchronous Data
Out
Output –
TMS/SWDIO Test Mode Select /Serial Wire Input/Output Input / I/O –
JTAGSEL JTAG Selection Input High
Permanent Internal
Pull-down
Flash Memory
ERASE
Flash and NVM Configuration Bits Erase
Command
Input High VDDIO
Reset State:
- Erase Input
- Internal Pull-down
enabled
- Schmitt Trigger enabled
(2)