Datasheet

547
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
Figure 28-20. TDF Optimization Disabled (TDF Mode = 0). TDF wait states between 2 read accesses on different chip selects
Figure 28-21. TDF Mode = 0: TDF wait states between a read and a write access on different chip selects
TDF_CYCLES = 6
TDF_CYCLES = 6
TDF_MODE = 0
A[
23:0]
read1 cycle
Chip Select
Wait State
MCK
read1 controlling signal
(NRD)
read2 controlling signal
(NRD)
D[7:0]
read1 hold = 1
read 2 cycle
read2 setup = 1
5 TDF WAIT STATES
(optimization disabled)
TDF_CYCLES = 4
TDF_CYCLES = 4
TDF_MODE = 0
(optimization disabled)
A
[23:0]
read1 cycle
Chip Select
Wait State
Read to Write
Wait State
MCK
read1 controlling signal
(NRD)
write2 controlling signal
(NWE)
D[7:0]
read1 hold = 1
write2 cycle
write2 setup = 1
2 TDF WAIT STATES