Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
534
Figure 28-7. READ_MODE = 1: Data is sampled by SMC before the rising edge of NRD
28.8.2.2 Read is Controlled by NCS (READ_MODE = 0)
Figure 28-8 shows the typical read cycle of an LCD module. The read data is valid t
PACC
after the falling edge of the
NCS signal and remains valid until the rising edge of NCS. Data must be sampled when NCS is raised. In that
case, the READ_MODE must be set to 0 (read is controlled by NCS): the SMC internally samples the data on the
rising edge of Master Clock that generates the rising edge of NCS, whatever the programmed waveform of NRD
may be.
Figure 28-8. READ_MODE = 0: Data is sampled by SMC before the rising edge of NCS
Data Sampling
t
PACC
MCK
A[23:0]
NCS
NRD
D[7:0]
Data Sampling
t
PACC
MCK
D[7:0]
A[23:0]
NCS
NRD