Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
510
27.3.2 Peripheral DMA Controller 1 (PDC1)
The Peripheral DMA Controller 1 handles transfer requests from the channel according to the following priorities
(Channel 0 is high priority):
Table 27-2. Peripheral DMA Controller (PDC1)
Instance name Channel T/R Channel Number
PWM Transmit 7
UART1 Transmit 4
UART1 Receive 0