Datasheet

501
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
26.8.16 DMAC Channel x [x = 0..3] Control A Register
Name: DMAC_CTRLAx [x = 0..3]
Address: 0x400C0048 [0], 0x400C0070 [1], 0x400C0098 [2], 0x400C00C0 [3]
Access: Read-write
Reset: 0x00000000
This register can only be written if the WPEN bit is cleared in “DMAC Write Protect Mode Register” on page 506
 BTSIZE: Buffer Transfer Size
The transfer size relates to the number of transfers to be performed, that is, for writes it refers to the number of source
width transfers to perform when DMAC is flow controller. For Reads, BTSIZE refers to the number of transfers completed
on the Source Interface. When this field is set to 0, the DMAC module is automatically disabled when the relevant channel
is enabled.
 SRC_WIDTH: Transfer Width for the Source
 DST_WIDTH: Transfer Width for the Destination
 DONE: Current Descriptor Stop Command and Transfer Completed Memory Indicator
0: The transfer is performed.
1: If SOD field of DMAC_CFG register is set to true, then the DMAC is automatically disabled when an LLI updates the
content of this register.
The DONE field is written back to memory at the end of the current descriptor transfer.
31 30 29 28 27 26 25 24
DONE – DST_WIDTH – – SRC_WIDTH
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
BTSIZE
76543210
BTSIZE
Value Name Description
00 BYTE the transfer size is set to 8-bit width
01 HALF_WORD the transfer size is set to 16-bit width
1X WORD the transfer size is set to 32-bit width
Value Name Description
00 BYTE the transfer size is set to 8-bit width
01 HALF_WORD the transfer size is set to 16-bit width
1X WORD the transfer size is set to 32-bit width