Datasheet

495
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
26.8.10 DMAC Channel Handler Enable Register
Name: DMAC_CHER
Address: 0x400C0028
Access: Write-only
 ENAx: Enable [3:0]
When set, a bit of the ENA field enables the relevant channel.
 SUSPx: Suspend [3:0]
When set, a bit of the SUSP field freezes the relevant channel and its current context.
 KEEPx: Keep on [3:0]
When set, a bit of the KEEP field resumes the current channel from an automatic stall state.
31 30 29 28 27 26 25 24
––––KEEP3 KEEP2 KEEP1 KEEP0
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
––––SUSP3SUSP2SUSP1SUSP0
76543210
––––ENA3ENA2ENA1ENA0