Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
484
26.7 Write Protection Registers
To prevent any single software error that may corrupt the DMAC behavior, the DMAC address space can be write-
protected by setting the WPEN bit in the “DMAC Write Protect Mode Register” (DMAC_WPMR).
If a write access to anywhere in the DMAC address space is detected, then the WPVS flag in the DMAC Write
Protect Status Register (MCI_WPSR) is set, and the WPVSRC field indicates in which register the write access
has been attempted.
The WPVS flag is reset by writing the DMAC Write Protect Mode Register (DMAC_WPMR) with the appropriate
access key, WPKEY.
The protected registers are:
 “DMAC Global Configuration Register” on page 486
 “DMAC Enable Register” on page 487
 “DMAC Channel x [x = 0..3] Source Address Register” on page 498
 “DMAC Channel x [x = 0..3] Destination Address Register” on page 499
 “DMAC Channel x [x = 0..3] Descriptor Address Register” on page 500
 “DMAC Channel x [x = 0..3] Control A Register” on page 501
 “DMAC Channel x [x = 0..3] Control B Register” on page 502
 “DMAC Channel x [x = 0..3] Configuration Register” on page 504