Datasheet

431
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
23.5.1 Cache Controller Type Register
Name: CMCC_TYPE
Address: 0x400C4000
Access: Read-only
 AP: Access Port Access Allowed
0: Access Port Access is disabled.
1: Access Port Access is enabled.
 GCLK: Dynamic Clock Gating Supported
0: Cache controller does not support clock gating.
1: Cache controller uses dynamic clock gating.
 RANDP: Random Selection Policy Supported
0: Random victim selection is not supported.
1: Random victim selection is supported.
 LRUP: Least Recently Used Policy Supported
0: Least Recently Used Policy is not supported.
1: Least Recently Used Policy is supported.
 RRP: Random Selection Policy Supported
0: Random Selection Policy is not supported.
1: Random Selection Policy is supported.
 WAYNUM: Number of Way
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
–CLSIZECSIZE
76543210
LCKDOWN WAYNUM RRP LRUP RANDP GCLK AP
Value Name Description
0 DMAPPED Direct Mapped Cache
1 ARCH2WAY 2-WAY set associative
2 ARCH4WAY 4-WAY set associative
3 ARCH8WAY 8-WAY set associative