Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
396
 Two 128-bit or 64-bit read buffers used for code read optimization
 One 128-bit or 64-bit read buffer used for data read optimization
 One write buffer that manages page programming. The write buffer size is equal to the page size. This buffer
is write-only and accessible all along the 1 Mbyte address space, so that each word can be written to its final
address.
 Several lock bits used to protect write/erase operation on several pages (lock region). A lock bit is
associated with a lock region composed of several pages in the memory plane.
 Several bits that may be set and cleared through the EEFC interface, called general-purpose non-volatile
memory bits (GPNVM bits)
The embedded Flash size, the page size, the organization of lock regions and the definition of GPNVM bits are
specific to the device. The EEFC returns a descriptor of the Flash controlled after a Get descriptor command
issued by the application (see “Get Flash Descriptor Command” on page 401).
Figure 21-1. Embedded Flash Organization
Start Address
Page 0
Lock Region 0
Lock Region 1
Memory Plane
Page (m-1)
Lock Region (n-1)
Page (n*m-1)
Start Address + Flash size -1
Lock Bit 0
Lock Bit 1
Lock Bit (n-1)