Datasheet

211
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
12.6.12 Miscellaneous Instructions
The table below shows the remaining Cortex-M4 instructions.
Table 12-28. Miscellaneous Instructions
Mnemonic Description
BKPT Breakpoint
CPSID Change Processor State, Disable Interrupts
CPSIE Change Processor State, Enable Interrupts
DMB Data Memory Barrier
DSB Data Synchronization Barrier
ISB Instruction Synchronization Barrier
MRS Move from special register to register
MSR Move from register to special register
NOP No Operation
SEV Send Event
SVC Supervisor Call
WFE Wait For Event
WFI Wait For Interrupt