Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
196
12.6.11.15 VMOV Scalar to ARM Core Register
Transfers one word of a doubleword floating-point register to an ARM core register.
Syntax
VMOV{cond} Rt, Dn[x]
where:
cond is an optional condition code, see “Conditional Execution” .
Rt is the destination ARM core register.
Dn is the 64-bit doubleword register.
x Specifies which half of the doubleword register to use:
- If x is 0, use lower half of doubleword register
- If x is 1, use upper half of doubleword register.
Operation
This instruction transfers:
 One word from the upper or lower half of a doubleword floating-point register to an ARM core register.
Restrictions
Rt cannot be PC or SP.
Condition Flags
These instructions do not change the flags.