Datasheet
1493
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
25-Apr-2013
RTC:
Section 18.2 “Embedded Characteristics”, added a new bullet "Safety/Security features”, right indented the 2 following
bullets.
Section 18.5 “Functional Description”, added the last paragraph (“The RTC can generate...”).
SUPC:
Updated Figure 20-1 “Supply Controller Block Diagram”.
Updated the 2-nd paragraph in Section 20.4.7.4 “Low-power Tamper Detection Inputs” and placed this section just after
Section 20.4.7.3 “Low-power Debouncer Inputs”.
EFC:
Typo fixed in Section 22.4.3.5 “GPNVM Bit” and added title in Section 22.4.3.6 “Calibration Bit”.
Added notes when FARG exceeds limits in Section 22.4.3.4 “Lock Bit Protection” and reworked the existing note in
Section 22.4.3.5 “GPNVM Bit”.
FFPI:
Removed duplicate and erroneous figures in:
- Section 23.3.1 “Device Configuration”
- Section 23.3.4.1 “Write Handshaking”
- Section 23.3.4.2 “Read Handshaking”
- Section 23.3.5.8 “Get Version Command”
Fixed the section structure.
MATRIX:
Removed references to Special Function Registers (SFR) and to Bus Matrix Priority Registers B for Slaves.
Updated sections:
- Section 26.1 “Description”
- Section 26.2 “Embedded Characteristics”
- Section 26.12 “Bus Matrix (MATRIX) User Interface”:
- Table 26-3 “Register Mapping”
- Section 26.12.1 - Section 26.12.4
- Section 26.12.7
Updated register names to “MATRIX_MCFGx [x=0..6]” and so on in Section 26.12.1 “Bus Matrix Master Configuration
Registers”, Section 26.12.2 “Bus Matrix Slave Configuration Registers”, and Section 26.12.3 “Bus Matrix Priority
Registers A For Slaves”.
Replaced the WPKEY bitfield description with the corresponding table in Section 26.12.7 “Write Protect Mode Register”.
PMC:
Section 30.2.16.9 “PMC Clock Generator PLLA Register”, removed “x8” in “PLLACOUNT: PLLA Counter” bitfield
description.
Section “”, replaced the KEY bitfield description with a table.
Section 30.2.16.20 “PMC Write Protect Mode Register”, replaced the WPKEY bitfield description with a table.
Updated the last paragraph in Section 30.1.5.2 “Fast RC Oscillator Clock Frequency Adjustment” and added the
corresponding note in Section 30.2.16.8 “PMC Clock Generator Main Clock Frequency Register”.
AES:
Updated Section 31.4.4 “DMA Mode” and Section 31.4.7 “DMA Mode” (“PDC Mode” --> “DMA Mode”).
Section 31.6.2 “AES Mode Register”, replaced the CKEY bitfield description with a table.
Table 52-3. SAM4E Datasheet Rev. 11157B 25-Ap
ril-2013 Revi
sion History (Continued)
Doc. Date Changes