Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1492
Table 52-3. SAM4E Datasheet Rev. 11157B 25-April-2013 Revision History
Doc. Date Changes
25-Apr-2013
Introduction:
Updated the section structure and added references to 100-ball TFBGA and 100-lead LQFP packages in:
- Section 1. “Features”
- Table 1-1 “Configuration Summary”
- Figure 2-1 “SAM4E 100-pin Block Diagram”
- Section 4.1 “100-ball TFBGA Package and Pinout”
- Section 4.3 “100-lead LQFP Package and Pinout”
- Table 11-1 “PIO available according to Pin Count”
Added Analog Comparator (ACC) and Reinforced Safety Watchdog Timer (RSWDT) blocks in Figure 2-2 “SAM4E 144-
pin Block Diagram”.
Updated the description of power supply pins in Section 5.1 “Power Supplies”.
Updated Figure 11-3 “Power Management Controller Block Diagram”.
Removed RC80M references in Figure 10-1 “System Controller Block Diagram” and Figure 11-2 “Clock Generator Block
Diagram”.
Add data on consumption and wake-up time in Table 5-1 “Low-power Mode Configuration Summary”.
Removed “AT91SAM” from the document title and further on in the entire document (where appropriate).
Replaced “Cortex™” references with “Cortex
®
“ in “Description” and further on in the entire document.
Section 11.14 “Chip Identification”, replaced “Table 11-1. SAM4E Chip ID Register” with a cross-reference to the
corresponding Table 14-1 “SAM4E Chip ID Registers” (Section 14. “Chip Identifier (CHIPID)”).
Removed package dimension references in Section 4. “Package and Pinout”.
Added a phrase on the flash write commands usage in Section 8.1.3.1 “Flash Overview” (the last paragraph).
Updated package information in Section 11.2 “Peripheral Signal Multiplexing on I/O Lines”:
- replaced “100/144 pin version” with “144 pin version” in Table 11-4 “Multiplexing on PIO Controller C (PIOC)”
- removed “144 pin version” in Table 11-5 “Multiplexing on PIO Controller D (PIOD)”
Updated Figure 7-1 “SAM4E Product Mapping”.
Replaced GRX by GRX1 on line PD6 in Table 11-5 “Multiplexing on PIO Controller D (PIOD)”.
CHIPID:
Section 14.3 “Chip Identifier (CHIPID) User Interface”, updated the ARCH bitfield table in “ARCH: Architecture Identifier”
(removed rows with not relevant information: 0x43, 0x88, 0x89, 0x8A, 0x93, 0x94, and 0x95).
Section 14.2 “Embedded Characteristics”, replaced ‘0x0011_0201’ with ‘0x0012_0201’ and ‘0x0011_0209’ with
‘0x0012_0209’ in Table 14-1 “SAM4E Chip ID Registers”.
Section 14.3.2 “Chip ID Extension Register”, updated value in the Flash Size table and removed package references in
the Product Number table.
RTT:
Section 16.3 “Block Diagram”, replaced ‘CLKSRC’ source reference with ‘RTC1HZ’ in Figure 16-1 “Real-time Timer”.
Updated the 4th and the 8th paragraphs in Section 16.4 “Functional Description” (“Setting the RTC 1 HZ clock to 1...” and
“The RTTINC bit in RTT_SR is set...” respectively).
Section 16.5.1 “Real-time Timer Mode Register”, added notes in “RTTDIS: Real-time Timer Disable” and “RTC1HZ: Real-
Time Clock 1Hz Clock Selection”.
RSWDT:
Added a new component: Section 17. “Reinforced Safety Watchdog Timer (RSWDT)”.