Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1488
12-Jun-2014
Section 46. “Digital-to-Analog Converter Controller (DACC)”
Editorial and formatting changes throughout.
MCK or Master clock replaced with Peripheral clock.
Removed references to Sleep mode and refresh period
Renamed “Features” chapter as “Embedded Characteristics”
Updated Section 46.2 “Embedded Characteristics””
In Section 46.7.2 “DACC Mode Register”:
- REFRESH bit replaced with ONE bit
- Removed FASTWAKEUP bit and SLEEP bit
Re-worked Section 46.6.7 “Register Write Protection” and associated registers and bit/field descriptions in
Section 46.7.7 “DACC Interrupt Enable Register”, Section 46.7.8 “DACC Interrupt Disable Register” and
Section 46.7.9 “DACC Interrupt Mask Register”: modified bit descriptions.
Section 46.7.12 “DACC Write Protection Mode Register”” and Section 46.7.13 “DACC Write Protection Status
Register”
Section 47. “SAM4E Electrical Characteristics”
Updated whole section
Added reference to note 1 in Table 47-12 “Typical Current Consumption in Wait Mode (1)” title
I
O
conditions modified in Table 47-2 “DC Characteristics”
VDDIN replaced with V
VDDIN
for VDDIN voltage values
VDDIO replaced with V
VDDIO
for VDDIO voltage values
Modified Section 47.3.1 “Backup Mode Current Consumption”
Modified Figure 47-7, “Measurement Setup for Wait Mode”
Updated Section 47.7 “12-bit AFE (Analog Front End) Characteristics” and Figure 47-14 “12-bit AFE (Analog
Front End) Diagram”
Updated Section 47.8 “12-bit DAC Characteristics”
Added Erase Pin Assertion Time in Table 47-71 “AC Flash Characteristics”
“Marking” section moved to Section 49.
Section 51. “Errata on SAM4E Devices”
Added Section 51.1.3 “Flash”
Table 52-1. SAM4E Datasheet Rev. 11157D 12-Jun-14 Revision history (Continued)
Doc. Date Changes