Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1480
12-Jun-2014
Section 17. “Watchdog Timer (WDT)”
Figure 17-2, “Watchdog Behavior”, “WDT_CR = WDRSTT” replaced with “WDT_CR.WDRSTT=1”
Section 18. “Reinforced Safety Watchdog Timer (RSWDT)”
General formatting and editorial changes throughout
Section 18.2 “Embedded Characteristics”: added bullet “Windowed Watchdog”
Figure 18-2 “Watchdog Behavior” replaced “RSWDT_CR = WDRSTT” with “RSWDT_CR.WDRSTT = 1”
Added notes in Section 18.5.2 “Reinforced Safety Watchdog Timer Mode Register” and updated Section 18.4
“Functional Description”.
KEY is now decribed with a table in Section 18.5.1 “Reinforced Safety Watchdog Timer Control Register”
Section 19. “Supply Controller (SUPC)”
Added Tamper detection and Anti-tampering (Section 19.2 “Embedded Characteristics”, Section 19.4.7.3 “Low-
power Tamper Detection and Anti-Tampering”)
“Low-power Debouncer Inputs” section restructured: content modified and included in Section 19.4.7.3 “Low-
power Tamper Detection and Anti-Tampering”
Updated Section 19.3 “Block Diagram” and Figure 19-4 “Wake-up Sources”
Updated Section 19.4.2 “Slow Clock Generator”, Section 19.4.4 “Supply Monitor”
Updated Section 19.4.4 “Supply Monitor”
Section 19.4.6.2 “Brownout Detector Reset” : Reworked 1st paragraph
Added Section 19.4.8 “Register Write Protection” and Section 19.4.9 “Register Bits in Backup Domain
(VDDIO)”
In Section 19.5.9 “System Controller Write Protection Mode Register”: updated register name and bit
descriptions.
Section 19-5 “Low-power Debouncer (Push-to-Make Switch, Pull-up Resistors)”, Section 19-6 “Low-power
Debouncer (Push-to-Break Switch, Pull-down Resistors)” and Section 19-7 “Using WKUP Pins Without
RTCOUTx Pins”: Modified pin names.
Updated Section 19.5.3 “Supply Controller Control Register”, Section 19.5.4 “Supply Controller Supply Monitor
Mode Register”, Section 19.5.6 “Supply Controller Wake-up Mode Register”, Section 19.5.7 “Supply Controller
Wake-up Inputs Register”, Section 19.5.8 “Supply Controller Status Register” and Section 19.5.9 “System
Controller Write Protection Mode Register” (added information on VDDIO domain and WPEN bit)
Section 19.4.7.2 “Wake-up Inputs” corrected WKUPPLx pins to WKUPTx pins. WKUP0, WKUP15 references
changed to WKUPx.
Section 20. “General Purpose Backup Registers (GPBR)”
Minor editorial changes
Section 20-1 “Register Mapping”: added reset value 0x00000000 for all registers SYS_GPBRx
Section 20.3.1 “General Purpose Backup Register x”: inserted sentence “These registers are reset at first
power-up and on each loss of VDDBU” below bitmap
Se
ction 2
1. “Enhanced Embedded Flash Controller (EEFC)”
Reworked section Section 21.4.3.2 “Write Commands” and all sub-sections with figures Figure 21-7 “Full Page
Programming” to Figure 21-9 “Programming Bytes in the Flash”
Modified Section 21.4.3.3 “Erase Commands”
In Section 21.5.2 “EEFC Flash Command Register”, changed the description of FARG field
Replaced NVIC by “interrupt controller” everywhere in the document.
Revised all figures in the section.
Section 22. “Fast Flash Programming Interface (FFPI)”
Modified Table 22-1 “Signal Description List” (removed references to PGMEN2)
Table 52-1. SAM4E Datasheet Rev. 11157D 12-Jun-14 Revision history (Continued)
Doc. Date Changes