Datasheet

1467
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
47.11.9 Embedded Flash Characteristics
The maximum operating frequency is given in Table 47-67, Table 47-68, Table 47-69 and Table 47-70, but it is
limited by the Embedded Flash access time when the processor is fetching code out of it. These tables provide the
device maximum operating frequency depending on the field FWS of the MC_FMR. This field defines the number
of wait states required to access the Embedded Flash Memory.
Table 47-67. Embedded Flash Wait State VDDCORE set at 1.08V and VDDIO 1.62V to 3.6V @105°C
FWS Read Operations Maximum Operating Frequency (MHz)
0 1 cycle 17
1 2 cycles 34
2 3 cycles 51
3 4 cycles 69
4 5 cycles 86
5 6 cycles 100
Table 47-68. Embedded Flash Wait State VDDCORE set at 1.08V and VDDIO 2.7V to 3.6V @105°C
FWS Read Operations Maximum Operating Frequency (MHz)
0 1 cycle 20
1 2 cycles 41
2 3 cycles 62
3 4 cycles 83
4 5 cycles 104
Table 47-69. Embedded Flash Wait State VDDCORE set at 1.2V and VDDIO 1.62V to 3.6V @ 105°C
FWS Read Operations Maximum Operating Frequency (MHz)
0 1 cycle 17
1 2 cycles 35
2 3 cycles 53
3 4 cycles 71
4 5 cycles 88
5 6 cycles 106
6 7 cycles 124
Table 47-70. Embedded Flash Wait State VDDCORE set at 1.20V and VDDIO 2.7V to 3.6V @ 105°C
FWS Read Operations Maximum Operating Frequency (MHz)
0 1 cycle 21
1 2 cycles 43
2 3 cycles 64
3 4 cycles 86
4 5 cycles 107
5 6 cycles 129