Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1398
46.7 Digital-to-Analog Converter Controller (DACC) User Interface
Table 46-3. Register Mapping
Offset Register Name Access Reset
0x00 Control Register DACC_CR Write-only –
0x04 Mode Register DACC_MR Read/Write 0x00000000
0x08–0x0C Reserved – – –
0x10 Channel Enable Register DACC_CHER Write-only –
0x14 Channel Disable Register DACC_CHDR Write-only –
0x18 Channel Status Register DACC_CHSR Read-only 0x00000000
0x1C Reserved – – –
0x20 Conversion Data Register DACC_CDR Write-only –
0x24 Interrupt Enable Register DACC_IER Write-only –
0x28 Interrupt Disable Register DACC_IDR Write-only –
0x2C Interrupt Mask Register DACC_IMR Read-only 0x00000000
0x30 Interrupt Status Register DACC_ISR Read-only 0x00000000
0x34–0x90 Reserved – – –
0x94 Analog Current Register DACC_ACR Read/Write 0x00000000
0x98–0xE0 Reserved – – –
0xE4 Write Protection Mode Register DACC_WPMR Read/Write 0x00000000
0xE8 Write Protection Status Register DACC_WPSR Read-only 0x00000000
0xEC–0xFC Reserved – – –