Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1382
45.7.16 AFEC Channel Gain Register
Name: AFEC_CGR
Address: 0x400B0054 (0), 0x400B4054 (1)
Access: Read/Write
This register can only be written if the WPEN bit is cleared in the AFEC Write Protection Mode Register.
 GAINx: Gain for channel x
Gain applied on input of Analog-Front-End.
The DIFFx mentioned in this table is described in Section 45.7.18 “AFEC Channel Differential Register”.
31 30 29 28 27 26 25 24
GAIN15 GAIN14 GAIN13 GAIN12
23 22 21 20 19 18 17 16
GAIN11 GAIN10 GAIN9 GAIN8
15 14 13 12 11 10 9 8
GAIN7 GAIN6 GAIN5 GAIN4
76543210
GAIN3 GAIN2 GAIN1 GAIN0
GAINx Gain applied when DIFFx = 0 Gain applied when DIFFx = 1
001 0.5
011 1
102 2
114 2