Datasheet

1377
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
45.7.12 AFEC Interrupt Mask Register
Name: AFEC_IMR
Address: 0x400B002C (0), 0x400B402C (1)
Access: Read-only
The following configuration values are valid for all listed bit names of this register:
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
 EOCx: End of Conversion Interrupt Mask x
 DRDY: Data Ready Interrupt Mask
 GOVRE: General Overrun Error Interrupt Mask
 COMPE: Comparison Event Interrupt Mask
 ENDRX: End of Receive Buffer Interrupt Mask
 RXBUFF: Receive Buffer Full Interrupt Mask
 TEMPCHG: Temperature Change Interrupt Mask
 EOCAL: End of Calibration Sequence Interrupt Mask
31 30 29 28 27 26 25 24
EOCAL TEMPCHG – RXBUFF ENDRX COMPE GOVRE DRDY
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
EOC15 EOC14 EOC13 EOC12 EOC11 EOC10 EOC9 EOC8
76543210
EOC7 EOC6 EOC5 EOC4 EOC3 EOC2 EOC1 EOC0