Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1376
45.7.11 AFEC Interrupt Disable Register
Name: AFEC_IDR
Address: 0x400B0028 (0), 0x400B4028 (1)
Access: Write-only
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Disables the corresponding interrupt.
 EOCx: End of Conversion Interrupt Disable x
 DRDY: Data Ready Interrupt Disable
 GOVRE: General Overrun Error Interrupt Disable
 COMPE: Comparison Event Interrupt Disable
 ENDRX: End of Receive Buffer Interrupt Disable
 RXBUFF: Receive Buffer Full Interrupt Disable
 TEMPCHG: Temperature Change Interrupt Disable
 EOCAL: End of Calibration Sequence Interrupt Disable
31 30 29 28 27 26 25 24
EOCAL TEMPCHG – RXBUFF ENDRX COMPE GOVRE DRDY
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
EOC15 EOC14 EOC13 EOC12 EOC11 EOC10 EOC9 EOC8
76543210
EOC7 EOC6 EOC5 EOC4 EOC3 EOC2 EOC1 EOC0