Datasheet

1375
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
45.7.10 AFEC Interrupt Enable Register
Name: AFEC_IER
Address: 0x400B0024 (0), 0x400B4024 (1)
Access: Write-only
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Enables the corresponding interrupt.
 EOCx: End of Conversion Interrupt Enable x
 DRDY: Data Ready Interrupt Enable
 GOVRE: General Overrun Error Interrupt Enable
 COMPE: Comparison Event Interrupt Enable
 ENDRX: End of Receive Buffer Interrupt Enable
 RXBUFF: Receive Buffer Full Interrupt Enable
 TEMPCHG: Temperature Change Interrupt Enable
 EOCAL: End of Calibration Sequence Interrupt Enable
31 30 29 28 27 26 25 24
EOCAL TEMPCHG – RXBUFF ENDRX COMPE GOVRE DRDY
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
EOC15 EOC14 EOC13 EOC12 EOC11 EOC10 EOC9 EOC8
76543210
EOC7 EOC6 EOC5 EOC4 EOC3 EOC2 EOC1 EOC0