Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1354
Figure 45-8. Non-Optimized Temperature Conversion
The temperature factor having a slow variation rate and potentially being totally different from the other conversion
channels, the AFE Controller allows a different way of triggering the measure when RTCT bit is set in the
AFEC_TEMPMR but the CH15 is cleared in the AFEC_CHSR.
Under these conditions the measure is triggered every second by means of an internal trigger generated by RTC,
always enabled and totally independent of the triggers used for other channels and selected through TRGSEL field
of the AFEC_MR. In this mode of operation the temperature sensor is only powered for a period of time covering
startup time and conversion time.
Every second, a conversion is scheduled for channel 15 but the result of the conversion is only uploaded on an
internal register (read by means of AFEC_CDR) and not in the AFEC_LCDR. Therefore there is no change in the
structure of the Peripheral DMA Controller buffer due to the conversion of the temperature channel, only the
enabled channel are kept in the buffer. The end of conversion of the temperature channel is reported by means of
EOC15 flag in the AFEC_ISR.
Base Address (BA)
BA + 0x02
AFEC_CDR[TEMP]0
AFEC_CDR[0]0
AFEC_CDR[0]0
BA + 0x04
AFEC_CDR[0]0
AFEC_CDR[TEMP]0
AFEC_CDR[TEMP]0
BA + 0x06
BA + 0x08
BA + 0x0A
Assuming AFEC_CHSR[0] = 1 and AFEC_CHSR[TEMP] = 1
where TEMP is the index of the temperature sensor channel
trig.event1
DMA Buffer
Structure
trig.event2
DMA Transfer
trig.event3
Internal/External
Trigger event
AFEC_SEL
C
T
C
T
T
C
T
C
C: Classic AFEC Conversion Sequence - T: Temperature Sensor Channel
C
T
AFEC_CHSR[TEMP] = 1, AFEC_MR.TRGEN = 1 and AFEC_TEMPMR.RTCT = 0
A
FEC_CDR[TEMP]
T1
T2T0
AFEC_CDR[0]
C0 C1
C2 C3
C4
C5
T3 T4
T5
AFEC_LCDR
C0
C1
C2 C3
C4
T1
T2T0
T3 T4 T5