Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1344
45.5.6 Timer Triggers
Timer Counters may or may not be used as hardware triggers depending on user requirements. Thus, some or all
of the timer counters may be unconnected.
45.5.7 PWM Event Line
PWM Event Lines may or may not be used as hardware triggers depending on user requirements.
45.5.8 Fault Output
The AFE Controller has the FAULT output connected to the FAULT input of PWM. Please refer to Section 45.6.16
“Fault Output” and implementation of the PWM in the product.
45.5.9 Conversion Performances
For performance and electrical characteristics of the AFEC, see the product DC characteristics.
45.6 Functional Description
45.6.1 Analog-Front-End Conversion
The AFEC uses the AFEC Clock to perform conversions. Converting a single analog value to a 12-bit digital data
requires Tracking Clock cycles as defined in the field TRACKTIM of the AFEC Mode Register (AFEC_MR) and
Transfer Clock cycles as defined in the field TRANSFER of the same register. The AFEC Clock frequency is
selected in the PRESCAL field of the AFEC_MR. The tracking phase starts during the conversion of the previous
channel. If the tracking time is longer than the conversion time, the tracking phase is extended to the end of the
previous conversion.
The AFEC clock range is between MCK/2, if PRESCAL is 0, and MCK/512, if PRESCAL is set to 255 (0xFF).
PRESCAL must be programmed in order to provide an AFEC clock frequency according to the parameters given
in the product electrical characteristics.
AFEC0 AFE0_AD10 PC30 X1
AFEC0 AFE0_AD11 PC31 X1
AFEC0 AFE0_AD12 PC26 X1
AFEC0 AFE0_AD13 PC27 X1
AFEC0 AFE0_AD14 PC0 X1
AFEC1 AFE1_AD0/WKUP12 PB2 X1
AFEC1 AFE1_AD1 PB3 X1
AFEC1 AFE1_AD2 PA21 X1
AFEC1 AFE1_AD3 PA22 X1
AFEC1 AFE1_AD4 PC1 X1
AFEC1 AFE1_AD5 PC2 X1
AFEC1 AFE1_AD6 PC3 X1
AFEC1 AFE1_AD7 PC4 X1
Table 45-3. I/O Lines