Datasheet

1241
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
 TXUBR: TX Used Bit Read
A read of this register returns the value of the transmit used bit read interrupt mask.
0: Interrupt is enabled.
1: Interrupt is disabled.
A write to this register directly affects the state of the corresponding bit in the Interrupt Status Register, causing an interrupt
to be generated if a 1 is written.
 TUR: Transmit Underrun
A read of this register returns the value of the transmit buffer underrun interrupt mask.
0: Interrupt is enabled.
1: Interrupt is disabled.
A write to this register directly affects the state of the corresponding bit in the Interrupt Status Register, causing an interrupt
to be generated if a 1 is written.
 RLEX: Retry Limit Exceeded
A read of this register returns the value of the retry limit exceeded interrupt mask.
0: Interrupt is enabled.
1: Interrupt is disabled.
A write to this register directly affects the state of the corresponding bit in the Interrupt Status Register, causing an interrupt
to be generated if a 1 is written.
 TFC: Transmit Frame Corruption Due to AHB Error
A read of this register returns the value of the transmit frame corruption due to AHB error interrupt mask.
0: Interrupt is enabled.
1: Interrupt is disabled.
A write to this register directly affects the state of the corresponding bit in the Interrupt Status Register, causing an interrupt
to be generated if a 1 is written.
 TCOMP: Transmit Complete
A read of this register returns the value of the transmit complete interrupt mask.
0: Interrupt is enabled.
1: Interrupt is disabled.
A write to this register directly affects the state of the corresponding bit in the Interrupt Status Register, causing an interrupt
to be generated if a 1 is written.
 ROVR: Receive Overrun
A read of this register returns the value of the receive overrun interrupt mask.
0: Interrupt is enabled.
1: Interrupt is disabled.
A write to this register directly affects the state of the corresponding bit in the Interrupt Status Register, causing an interrupt
to be generated if a 1 is written.