Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1234
43.7.10 Interrupt Status Register
Name: GMAC_ISR
Address: 0x40034024
Access: Read-only
This register indicates the source of the interrupt. In order that the bits of this register read 1, the corresponding interrupt
source must be enabled in the mask register. If any bit is set in this register, the GMAC interrupt signal will be asserted in
the system.
 MFS: Management Frame Sent
The PHY Maintenance Register has completed its operation. Cleared on read.
 RCOMP: Receive Complete
A frame has been stored in memory. Cleared on read.
 RXUBR: RX Used Bit Read
Set when a receive buffer descriptor is read with its used bit set. Cleared on read.
 TXUBR: TX Used Bit Read
Set when a transmit buffer descriptor is read with its used bit set. Cleared on read.
 TUR: Transmit Underrun
This interrupt is set if the transmitter was forced to terminate a frame that it has already began transmitting due to further
data being unavailable.
This interrupt is set if a transmitter status write back has not completed when another status write back is attempted.
This interrupt is also set when the transmit DMA has written the SOP data into the FIFO and either the AHB bus was not
granted in time for further data, or because an AHB not OK response was returned, or because the used bit was read.
 RLEX: Retry Limit Exceeded
Transmit error. Cleared on read.
 TFC: Transmit Frame Corruption Due to AHB Error
Transmit frame corruption due to AHB error. Set if an error occurs while midway through reading transmit frame from the
AHB, including HRESP errors and buffers exhausted mid frame.
 TCOMP: Transmit Complete
Set when a frame has been transmitted. Cleared on read.
31 30 29 28 27 26 25 24
– – – WOL – SRI PDRSFT PDRQFT
23 22 21 20 19 18 17 16
PDRSFR PDRQFR SFT DRQFT SFR DRQFR – –
15 14 13 12 11 10 9 8
– PFTR PTZ PFNZ HRESP ROVR – –
76543210
TCOMP TFC RLEX TUR TXUBR RXUBR RCOMP MFS