Datasheet

SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1220
43.7.1 Network Control Register
Name: GMAC_NCR
Address: 0x40034000
Access: Read/Write
 LBL: Loop Back Local
Connects GTX to GRX, GTXEN to GRXDV and forces full duplex mode. GRXCK and GTXCK may malfunction as the
GMAC is switched into and out of internal loop back. It is importan t that receive and transmit circuits have already been
disabled when making the switch into and out of internal loop back.
 RXEN: Receive Enable
When set, RXEN enables the GMAC to receive data. When reset frame reception stops immediately and the receive pipe-
line will be cleared. The Receive Queue Pointer Register is unaffected.
 TXEN: Transmit Enable
When set, TXEN enables the GMAC transmitter to send data. When reset transmission will stop immediately, the transmit
pipeline and control registers will be cleared and the Transmit Queue Pointer Register will reset to point to the start of the
transmit descriptor list.
 MPE: Management Port Enable
Set to one to enable the management port. When zero, forces MDIO to high impedance state and MDC low.
 CLRSTAT: Clear Statistics Registers
This bit is write-only. Writing a one clears the statistics registers.
 INCSTAT: Increment Statistics Registers
This bit is write-only. Writing a one increments all the statistics registers by one for test purposes.
 WESTAT: Write Enable for Statistics Registers
Setting this bit to one makes the statistics registers writable for functional test purposes.
 BP: Back pressure
If set in 10M or 100M half duplex mode, forces collisions on all received frames.
 TSTART: Start Transmission
Writing one to this bit starts transmission.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
–––––FNPTXPBPF ENPBPR
15 14 13 12 11 10 9 8
SRTSM – – TXZQPF TXPF THALT TSTART BP
76543210
WESTAT INCSTAT CLRSTAT MPE TXEN RXEN LBL –