Datasheet

1195
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
0
Ownership—needs to be zero for the GMAC to write data to the receive buffer. The GMAC
sets this to one once it has successfully written a frame to memory.
Software has to clear this bit before the buffer can be used again.
Word 1
31 Global all ones broadcast address detected
30 Multicast hash match
29 Unicast hash match
28 –
27
Specific Address Register match found, bit 25 and bit 26 indicate which Specific Address
Register causes the match.
26:25
Specific Address Register match. Encoded as follows:
00: Specific Address Register 1 match
01: Specific Address Register 2 match
10: Specific Address Register 3 match
11: Specific Address Register 4 match
If more than one specific address is matched only one is indicated with priority 4 down to 1.
24
This bit has a different meaning depending on whether RX checksum offloading is enabled.
With RX checksum offloading disabled: (bit 24 clear in Network Configuration Register)
Type ID register match found, bit 22 and bit 23 indicate which type ID register causes the
match.
With RX checksum offloading enabled: (bit 24 set in Network Configuration Register)
0: The frame was not SNAP encoded and/or had a VLAN tag with the Canonical Format
Indicator (CFI) bit set.
1: The frame was SNAP encoded and had either no VLAN tag or a VLAN tag with the CFI
bit not set.
23:22
This bit has a different meaning depending on whether RX checksum offloading is enabled.
With RX checksum offloading disabled: (bit 24 clear in Network Configuration)
Type ID register match. Encoded as follows:
00: Type ID register 1 match
01: Type ID register 2 match
10: Type ID register 3 match
11: Type ID register 4 match
If more than one Type ID is matched only one is indicated with priority 4 down to 1.
With RX checksum offloading enabled: (bit 24 set in Network Configuration Register)
00: Neither the IP header checksum nor the TCP/UDP checksum was checked.
01: The IP header checksum was checked and was correct. Neither the TCP nor UDP
checksum was checked.
10: Both the IP header and TCP checksum were checked and were correct.
11: Both the IP header and UDP checksum were checked and were correct.
21
VLAN tag detected—type ID of 0x8100. For packets incorporating the stacked VLAN
processing feature, this bit will be set if the second VLAN tag has a type ID of 0x8100
Table 43-2. Receive Buffer Descriptor Entry (Continued)
Bit Function